Okay, cool. Glad I had read it right. So why would something creating an additional, not-accounted-for delay require increasing the existing delay? That's the only thing I'm confused about. That said I'm using 2ms already in my own code so, hey, close enough. The GM spec sheet suggests the rise/fall time is only 20 microseconds, but without an oscilloscope I can't really confirm what's going on in reality-land. It would be interesting to see if using your timer ISR set to 1 tick would be sufficient when the code isn't doing anything else during transmission. Though as another note, even though their waveform diagram shows 20 microseconds, and their SXR (discrete IC) shows 20 microseconds, the diagram using a non-SXR circuit specifies a minimum of 108.1 microseconds and a maximum of 147.1 microseconds. It's not explained in the text where this discrepancy is coming from.
Point being, while 2ms works fine, it's likely actually cutting into the error-related buffer period of the transmission rather than merely accounting for the inherent electrical delays associated with the ALDL bus design. At the moment my car has no electrical power since I'm doing work on the alternator and some other stuff, but once it's back together enough to fire up the CCM again, I'll do some more tests.
Yeah, and if we were using GM's IC, this problem would be taken care of for us. I have a very, very strong feeling that that IC is actually what Torqhead is salvaging from those PCMs they get as core charges for adding CCM integration. That's why they give you a $100 discount if you decide you don't want CCM integration at all, but toss in a core charge if you do. Because without CCM integration there's no need for that chip at all. With it, their solution is clearly relying on transmission tech from the time rather than creating their own discrete circuit. Perhaps they don't know as much about the bus as we now do.
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