Code: Learning Disassembly Assembly

[brian89gp]

Initalizing at $01FF makes sense then, it is the highest RAM address in the ECM's I'm looking at and would grow down from there. How do you determine how deep the stack can get? Count the nested JSR and similar?

Second question(s). I know about the main segment loop and how it is called based off of a interrupt from a timer. What happens if it is still in one of the loops when the next interrupt comes, for example if you add too much code and it doesn't complete in time? What happens when a loop finishes before the next interrupt?

The main segment loop seems to be mainly the measurement and calculation of values and the output of those values (ignition and injection events) are driven by other interrupts seperate from the main segment loop? How do I determine how those are called, and which part of code is called? Or do I have it all mixed up and it works differently?

[RobertISaar]

i determine how far the stack gets by transmitting addresses near the end of the memory map via ALDL. if the values always stay 0, the stack hasn't reached that far. if they change values at any point, the stack has reached that far.

if one loop doesn't finish before the next is set to begin, a couple of things happen.... in all code i've seen, there is a flag that will get set when that event occurs, but it is entirely informational, it won't effect the operation of the code. when an interrupt happens though, A, B, X, Y the CCR, stack pointer and program counter all get stored to the stack, that's 11 bytes. when the RTI instruction comes up, those get pulled back off and the processor resumes what it was doing before the interrupt. if the stack gets reinitialized, then all of that data is lost. incidentally, the interrupt code for the 160Hz timer reinitializes the stack every time it comes up. in A1, the address of FFF2 shows A21F, so the code jumps there. byte 100 is checked to see if bit 7 is set, can jump around depending on why the timing interrupt was called, but if it was due to the 160Hz timer code, then it LDS 1FF to clear the existing stack.

[brian89gp]

Is there one timer interrupt, or many timer interrupts? I am assuming that the 160Hz timer is for the main segment loop?

If I understand correctly, if a loop is interrupted and the stack is reinatlized it just keeps moving along with the next segment in the sequence? Since the main segment loops only really measure and calculate the worse that happens is something doesn't get updated to a more current value and since each segment of the loop runs 10 times a second this is no big deal since it will just be done on the next time the loop is ran?

Ignition, injection, and what else? I assume these are ran on an interrupt to be sure they happen at the correct time, and they take priority over the background main segment loop processing? What all runs on these interrupts? Where do these interrupts get defined/called? I sort of followd your last paragraph but not fully understanding it.

[RobertISaar]

with the P4 processors, there is one vector for internal interrupts. at the vector location, there are a few paths that the code can take, depending on what caused the interrupt. some of them are for ALDL (when the receive data register is full or the transmit data register is empty) or to update the SCI controlled outputs or to deal with the 160Hz timer. it would appear that when both 4007 and 4008 bit 0 are set, that indicates that the 160Hz timer caused the interrupt. so the code loads $CD to the A register and then adds the value of the timer at 4006 to it, and then stored to 4006. this timer is continuously incremented and when the timer runs up to the new value, an interrupt is generated. $CD is equivalent to a period of 0.006256103515625mS since the timer counts at a rate of 32,768Hz.

the 160Hz timer is used mainly to determine which code to execute in the loops that exist. most P4s tend to have 1 or 2 loop tables and you'll see the timer pulled immediately before looking up which code section it jumps to. the value will have an AND operation done to it to create a value that could be anything from 0 to 160 to being 0 to whatever number of possibly code locations it will jump to.

and your understanding of how the loops work is correct. it's kind of a neat system but if something doesn't make it all the way through the first time, pretty good chance of it not making it through the next time since it will be roughly the same processing time required(with variables being other interrupts).

ignition and injection are dealt with when the external interrupt code runs. one of the possible external interrupts are the 3X(or 2X or 4X) reference pulse. injection is pretty simple with MPFI, since nothing really needs timed, just when an interrupt happens, inject for x time. i haven't looked for the section of code for it, but i assume that there is a section of code that indicates the number of reference pulses before another injection event takes place. there is also the possibility that the reference period is used to estimate the amount of time between injection events need to happen and then an interrupt is generated there. with ignition, timing is critical so there are more registers to deal with it. the code turns a crank angle into crank time, so when a ref pulse happens and the code knows that the pulse happens 60* before TDC(for example), it takes the desired spark advance, turns it into "how long before the spark needs to happen", then subtracts time out for the dwell period, then creates "how long until EST circuit needs to go high to start dwell" and "how long to dwell to make plugs fire when desired".

with the P4, there are still a lot of unknowns. with the P6, being a standard part(68HC11F1) everything stated in the pink book is accurate.

yes, there is some prioritization when it comes to interrupts, the pink book describes them, though only some will apply to a P4.

what runs on an interrupt: the absolute bare minimum that will do the function the interrupt needs to do. when an interrupt is being serviced, other interrupts are disabled and it takes away from processing time that could be used to execute other code. fat interrupt code will cause problems.

[brian89gp]

What is the GM HUD? Some sort of code debugging hardware that plugs into the card edge connector? I see that $5000-$6fff and $0400-04ff addresses are for the HUD, if the HUD is not plugged in are these addresses usable? I seem to remember something about any write to a certain address space will cause a reset but can't remember the range.

I also seem to remember that the 3x3 grid used for the BLM cells are stored by battery backed RAM. Where are these in the address space, is some RAM battery backed and others not? I could just be remembering all of this wrong too.

what runs on an interrupt: the absolute bare minimum that will do the function the interrupt needs to do. when an interrupt is being serviced, other interrupts are disabled and it takes away from processing time that could be used to execute other code. fat interrupt code will cause problems.

That makes sense.

[RobertISaar]

GM HUD = connected to edgecard connector, code tends to write a lot of values to it that would be useful to view while doing the initial calibration to a vehicle.

5000-5FFF is HUD ROM, 400-4FF is HUD RAM.

read OR write to the 6000-6FFF area will cause a reset, IIRC. i need to test this though. i was planning on using the area for basically "scratch" space to allow anything to be written in it that isn;t necessarily needed by the processor to operate the vehicle(like revision info, etc).

if the HUD isn't plugged in and you have RAM or ROM mapped to the area, you can use it however you want.

BLM cells..... depends. some only have a total of 3, while others are 16 or 16X2(CCP and non-CCP) or anything in between. i would ASSUME they would all be stored in the battery backed RAM, all of them that i have looked at seem to be.

in a typical P4, 00-FF is battery backed and 100-1FF is not. however, there are special P4s out there, ones that map RAM all the way out to 3FF, those MIGHT have more battery backed RAM. there could be more P4s too. i seem to remember the 4.5/4.9 cadillacs having some out of the ordinary hardware.

[brian89gp]

P4 vs P6? 8 vs 16 bit?