1997 F-Body ECM

**kur4o** · 02-04-2019

I have a p/n of similar driver that might help you identify the main functions.
These are known as quad driver and are 23 or 15 pin packages.
23 pin package:

motorola
185
16166240
yyek9546

It is from a gm pcm with 68hc11 processor. The command pinout is the same.

The 15 pin package from 94 v6 pcm is
45980
980 taiwan
92106
9326CB

Voltage regulator chip on 94-95 pcm is
70306
466
33738985

Could that symbios chip are some kind of AD converters with really high frequency. Injector drivers and highres opti signal are sub 1ms signals. Did you trace the low res signal.

The pcm you have can communicate over the ALDL bus. It supports mode 01 and mode 03. MODE 3 gives you the ability to request memory dump from RAM realtime for easy debugging. It won`t be hard to patch other modes also.

To communicate over ALDL you need a simple ftdi based serial to usb converter, and eehack as a comm terminal.

**Tom H** · 02-04-2019

Once again thanks for your help & info!

Quite sure the 15 pin sip on my Tside is a stepper motor driver for the IAC. All connections confirm. I will see if I can dig up datasheets but it's sort of a needle in a haystack kind of prop. Fall back is to understand the function such that we can analyze the code better...

Hmmmm fast a/d: will give that thought. Working through hi&low res trace and will post soon, many thought paths&lots of work to complete. I will try to do this over the next few days. Now trying to prep for testing the optispark simulator. I realize that VATS will get in my way. As I understand it that can be taken care of with a 50hz square wave (?)

I got the code I am working on from a home brew aldl interface I built. Wish IDA had been around when I did that, my home brew disassembler lacks all the nice features. Thanks for that tip, you are a great help with this project.

EEhack doesn't like some thing about my setup and crashes. I have the code to see what is wrong... but that is yet another project.

Not yet started on upload / download code.

-Tom

Originally Posted by kur4o

I have a p/n of similar driver that might help you identify the main functions.
These are known as quad driver and are 23 or 15 pin packages.
23 pin package:

motorola
185
16166240
yyek9546

It is from a gm pcm with 68hc11 processor. The command pinout is the same.

The 15 pin package from 94 v6 pcm is
45980
980 taiwan
92106
9326CB

Voltage regulator chip on 94-95 pcm is
70306
466
33738985

Could that symbios chip are some kind of AD converters with really high frequency. Injector drivers and highres opti signal are sub 1ms signals. Did you trace the low res signal.

The pcm you have can communicate over the ALDL bus. It supports mode 01 and mode 03. MODE 3 gives you the ability to request memory dump from RAM realtime for easy debugging. It won`t be hard to patch other modes also.

To communicate over ALDL you need a simple ftdi based serial to usb converter, and eehack as a comm terminal.

**Tom H** · 02-04-2019

Some more detail regarding idle air control stepper motor drive. The driver for the stepper is on the Tside board, interface through the gray connector. The part is a 15 pin SIPP lead formed in an alternating way (Sometimes referred to as zip?)
The stepper function is quite simple as the motor does not spin, just makes fine adjustments by slight rotation of the lead screw. Because of this there are no need to worry about acceleration and speed. There is a simple table of outputs that are applied to make corrections to idle speed. Since the function is mostly in code, here are a few lines:

Code:

546B  F6 18 22        LDAB   $1822           ; INDEX TO MOTOR PHASE CTL
546E  CE 65 E1        LDX    #$65E1          ; POINT AT IAC PHASE TABLE
5471  C4 03           ANDB   #$03            ; ADD CURRENT PHASE OFFSET
5473  3A              ABX                    ; 

5474  B6 10 00        LDAA   $1000           ; SET 2 MS BITS TO CONTROL
5477  84 3F           ANDA   #$3F            ; IAC MOTOR. CLEAR BITS
5479  AB 00           ADDA   $00,X           ; THEN SET AS PER TABLE
547B  B7 10 00        STAA   $1000           ; OUTPUT TO MOTOR
...
Table
 ...
************************************************
* TABLE AFFECTS 2 MS BITS OF PORT A
* IAC MOTOR PHASES ARE ON BIT 6 AND 7
************************************************
65E1  00 40 C0 80

The code outputs each of the table entries in sequence causing the motor to step.

Information about the hookup of this part is in the pdf below

-Tom

Update to post: Adding pdf file with details of all the SIPP driver chips and connections. Take care... best efforts only to determine connection

**Tom H** · 02-05-2019

Traced through the inputs for optispark. Both wind up in unidentified logic but the signal conditioning part is complete. This is a work in progress but will shuffle to the back burner for a bit.

While doing this, I have identified another chip if this is of interest. Parts marked
014
P66AB
83833

are a quad Nand or And function. I need to sort out which (easy once I get the scope on it). I believe the part to be 74HC08 or possibly 74HC00. This part is used in the bank switching for the 28F010 Flash. In that application, A15 is one input and Port A bit 5 is used to switch the upper half of the FLASH. In this way the lower 32K of the address space remains constant while only the upper 32 is switched.

OK so back to opti... here is the info on the input signal conditioning. Interesting to note, going back to spfautsch's reply that the Hi Res signal is inverted in the signal conditioning comparitor. Hmmmm

-Tom

-----------------------------------------

HiRes_RB_SS.jpg

High Resolution signal enters through connector:
Connector C2 (BLACK)
Pin 20
Wire Purple/White
Circuit 430
Name High Resolution Signal

1 Capacitor to ground HIRES_C1
2 1K Pull up resistor to +5V HIRES_R1
3 100K resistor to Node A HIRES_R2
4 Capacitor to ground HIRES_C2
5 Resistors HIRES_R3 AND HIRES_R4 form a divider between 5V and ground
this 2.5 volt reference is the +VE input to comparitor 2 on pin 11
6 Resistor HIRES_R5 connects to the -VE Input of comparitor pin 10
7 LM339 is an open collector type ouput on pin 13. HIRES_R6 is used to
pull the output to +5V.
8 HIRES_R7 provides feedback/hysteresis to the +VE input / voltage divider.
9 Pin 4 of the unknown 28 pin PLCC see below

Comparitor chip is marked
014
M66DB
89551

Believed to be a LM339 quad comparitor or a variant
that shares the pin configuration.

Unknown 28 pin PLCC
609-3700521
CP08978
144436
9638N
SYMBIOS LOGIC
726

LoRes_RB_SS.jpg

Low Resolution signal enters through connector:
Connector C2 (BLACK)
Pin 2
Wire Red/Black
Circuit 453
Name Low Resolution Signal

1 Capacitor to ground LORES_C1
2 1.0K Pull up resistor to +5V LORES_R1
3 100K resistor to Node A LORES_R2
4 Capacitor to ground
5 10K Resistor to Node B LORES_R3
6 Resistor feedback LORES_R4
7 +VE Input of comparitor LM339 pin 9
8 -VE Input of comparitor pin 8 to pins 4,6 and 10
these inputs are biased to 2.5V by components
Resistor VATS_R5
Resistor VATS_R6
Capacitor VATS_C3
9 LM339 is an open collector type ouput. LORES_R5
resistor pulls the output to +5V. Output is pin 14
10 Unknown logic chip pin 9

Comparitor chip is marked
014
M66DB
89551

Believed to be a LM339 quad comparitor or a variant
that shares the pin configuration.

Unknown logic chip is TI branded and marked
014
P63SN
73098

**Tom H** · 02-06-2019

Some code from the Tside used to monitor low side drivers on both boards for short and open condition...

-Tom

Code:

************************************************
* READ STATUS OF OUTPUT DRIVERS THROUGH SPI
************************************************
BAA2  12 B3 01 03 	BRSET  @$B3,$01,$BAA9  ; SPI FRAME TX IN PROGRESS

BAA6  7E BB 29    	JMP    $BB29           ; DONE

BAA9  13 7F 10 03 	BRCLR  @$7F,$10,$BAB0  ; BRANCH IF BATTERY NOT LOW

BAAD  7E BB 29    	JMP    $BB29           ; DONE


BAB0  0F          	SEI                    ; DISABLE INTERRUPTS

BAB1  7F 10 28    	CLR    $1028           ; RE-INITIALIZE SPI FOR MASTER
BAB4  86 50       	LDAA   #$50            ; MODE AND DIFFERENT CLOCK PHASE
BAB6  B7 10 28    	STAA   $1028           ; TO MATCH LOW SIDE DRIVER CHIPS

BAB9  CE 18 00    	LDX    #$1800          ; PORT REPLACEMENT CHIP


* C1 (RED) CONNECTOR DRIVER
BABC  1D 00 10    	BCLR   $00,X,$10       ; SELECT FIRST LOW SIDE DRIVER

BABF  B6 10 29    	LDAA   $1029           ; READ SPI STATUS AND WRITE
BAC2  B7 10 2A    	STAA   $102A           ; STATUS AS DATA TO INITIATE TRANSFER
BAC5  3D          	MUL                    ; REAL TIME DELAY
BAC6  3D          	MUL                    ; 
BAC7  B6 10 2A    	LDAA   $102A           ; READ SPI DATA
BACA  9A 90       	ORRA   @$90            ; UPDATE OPEN CIRCUIT STATUS
BACC  97 90       	STAA   @$90            ; 

BACE  B6 10 29    	LDAA   $1029           ; READ SPI STATUS
BAD1  B7 10 2A    	STAA   $102A           ; INITIATE TRANSFER
BAD4  3D          	MUL                    ; REAL TIME DELAY
BAD5  3D          	MUL                    ; 
BAD6  B6 10 2A    	LDAA   $102A           ; READ SPI DATA
BAD9  9A 8F       	ORRA   @$8F            ; UPDATE SHORT CIRCUIT STATUS
BADB  97 8F       	STAA   @$8F            ; 

BADD  1C 00 10    	BSET   $00,X,$10       ; DE-SELECT FIRST LOW SIDE DRIVER


* C2 (BLACK) CONNECTOR DRIVER
BAE0  1D 00 20    	BCLR   $00,X,$20       ; SELECT SECOND LOW SIDE DRIVER

BAE3  B6 10 29    	LDAA   $1029           ; READ SPI STATUS AND WRITE
BAE6  B7 10 2A    	STAA   $102A           ; STATUS AS DATA TO INITIATE TRANSFER
BAE9  3D          	MUL                    ; REAL TIME DELAY
BAEA  3D          	MUL                    ; 
BAEB  B6 10 2A    	LDAA   $102A           ; READ SPI DATA
BAEE  9A 92       	ORRA   @$92            ; UPDATE OPEN CIRCUIT STATUS
BAF0  97 92       	STAA   @$92            ; 

BAF2  B6 10 29    	LDAA   $1029           ; READ SPI STATUS
BAF5  B7 10 2A    	STAA   $102A           ; INITIATE TRANSFER
BAF8  3D          	MUL                    ; REAL TIME DELAY
BAF9  3D          	MUL                    ; 
BAFA  B6 10 2A    	LDAA   $102A           ; READ SPI DATA
BAFD  9A 91       	ORRA   @$91            ; UPDATE SHORT CIRCUIT STATUS
BAFF  97 91       	STAA   @$91            ; 

BB01  1C 00 20    	BSET   $00,X,$20       ; DE-SELECT SECOND LOW SIDE DRIVER


* BLUE CONNECTOR DRIVER
BB04  1D 00 40    	BCLR   $00,X,$40       ; SELECT THIRD LOW SIDE DRIVER 

BB07  B6 10 29    	LDAA   $1029           ; READ SPI STATUS AND WRITE
BB0A  B7 10 2A    	STAA   $102A           ; STATUS AS DATA TO INITIATE TRANSFER
BB0D  3D          	MUL                    ; REAL TIME DELAY
BB0E  3D          	MUL                    ; 
BB0F  B6 10 2A    	LDAA   $102A           ; READ SPI DATA
BB12  9A 94       	ORRA   @$94            ; UPDATE OPEN CIRCUIT STATUS
BB14  97 94       	STAA   @$94            ; 

BB16  B6 10 29    	LDAA   $1029           ; READ SPI STATUS
BB19  B7 10 2A    	STAA   $102A           ; INITIATE TRANSFER
BB1C  3D          	MUL                    ; REAL TIME DELAY
BB1D  3D          	MUL                    ; 
BB1E  B6 10 2A    	LDAA   $102A           ; READ SPI DATA
BB21  9A 93       	ORRA   @$93            ; UPDATE SHORT CIRCUIT STATUS
BB23  97 93       	STAA   @$93            ; 

BB25  1C 00 40    	BSET   $00,X,$40       ; DE-SELECT THIRD LOW SIDE DRIVER 

BB28  0E          	CLI                    ; ENABLE INTERRUPTS
BB29  39          	RTS                    ; DONE

**Tom H** · 02-07-2019

How does this code match up with what other folks have found? Not sure yet why engine rpm is calculated twice with different scale factors... re-use of older code??

Code:

************************************************
* OPTISPARK LOW RES SIGNAL IS DRIVEN OFF THE CAM
* AND HAS EIGHT SLOTS. EACH TWO ENGINE REVS GENERATE
* EIGHT PULSES OR FOUR PER REVOLUTION. 
*
* LOCATION $01E0 IS THE NUMBER OF 5.086US TICKS 
* BETWEEN EACH CYL. THIS VALUE COMES FROM 
* THE TIMER CLOCK INPUT AND PRESCALE AS:
* 12.5829MHZ /4 /16 = 196,608HZ OR 5.086US
*
* FDIV DIVIDES THE CONSTANT 461 * 2^16 OR 30,212,096
* DIVIDED BY THE NUMBER OF TICKS
* RESULT IS 8 * RPM.
*
* FOR 1000RPM, OR 16.66RPS, EACH OF THE EIGHT LOW
* RES PULSES HAPPEN AT 90 DEGREES (CRANK-> 45 CAM&OPTI)
* OR 66.666HZ/.015MS
* 15MS/5.086US = 2949 TICKS BETWEEN LOW RES PULSES
* 30,212,096/2949 = 10244....1000 RPM.
***********************************************

7182  FE 01 E0    	LDX    $01E0           ; TIMER TICKS BETWEEN LO RES INTS
7185  CC 01 CD    	LDD    #$01CD          ; DIVIDE CONSTANT 461 * 65536
7188  03          	FDIV                   ; DIVIDE TO GET RPM * 10
7189  8F          	XGDX                   ; 
718A  37          	PSHB                   ; SAVE RPM * 10
718B  36          	PSHA                   ; 
718C  C3 00 80    	ADDD   #$0080          ; FORCE CARRY OUT FROM LSBYTE
718F  24 02       	BCC    $7193           ; SHOULD NOT OVERFLOW

7191  86 FF       	LDAA   #$FF            ; FORCE ERROR INDICATION
7193  B7 01 62    	STAA   $0162           ; RPM * 10/256 OR RPM/25

7196  32          	PULA                   ; RESTORE RPM * 10
7197  33          	PULB                   ; 
7198  05          	ASLD                   ; MULTIPLY BY 2
7199  25 05       	BCS    $71A0           ;  

719B  C3 00 80    	ADDD   #$0080          ; FORCE CARRY OUT FROM LSBYTE
719E  24 02       	BCC    $71A2           ; 

71A0  86 FF       	LDAA   #$FF            ; FORCE ERROR INDICATION
71A2  B7 01 63    	STAA   $0163           ; RPM * 20/256 OR RPM/12.5

71A5  5F          	CLRB                   ; 
71A6  FE 01 64    	LDX    $0164           ; READ AGERAGE RPM
71A9  27 06       	BEQ    $71B1           ; IF ENGINE NOT RUNNING, BRANCH

71AB  F6 2A 25    	LDAB   $2A25           ; FLASH CONST $33
71AE  BD 4E 94    	JSR    $4E94           ; CALCULATE AVERAGE, OLD * 5/6 + 33 * NEW

71B1  FD 01 64    	STD    $0164           ; UPDATE 20 * RPM


* CALCULATE HIGH RESOLUTION ENGINE SPEED: RPM X 4
71B4  CC 00 B4    	LDD    #$00B4          ; DIVIDE CONSTANT 180 * 65536
71B7  FE 01 E0    	LDX    $01E0           ; TIMER TICKS BETWEEN LO RES INTS
71BA  03          	FDIV                   ; RESULT IS 4* RPM
71BB  8C 00 B4    	CPX    #$00B4          ; TEST FOR 45 RPM
71BE  22 03       	BHI    $71C3           ; BRANCH IF RUNNING...

71C0  CE 00 00    	LDX    #$0000          ; MARK AS NOT RUNNING
71C3  FF 01 D0    	STX    $01D0           ; ENGINE RPM X 4

**kur4o** · 02-16-2019

Great work on the hardware side. It does clear some missing pieces.

The rpm calculations come in many different scalars, because of the various tables that need different resolution. There is aso a rpm variation coefficient, that is not clear what is does.

Here is the code that is used for PCM flashing. I tried to label most of them. You can do a disassembly to get an insight of the process.