Originally Posted by
kur4o
06 aa is the positive response when upload is good, it can be followed with some data like 2 byte checksum or chipid.
It is some standard frame response.
This is the header that is uploaded via mode5 request for a checksum range.
And you are right it is 7e not bd. This was the initial version that crashes but wasn`t fixed in the dissasembly.
Thank you, I think the transmit routine detailed here is correct now. I was interested to find that in the flash code there seems to be separate support for Intel and AMD sourced flash. I would expect that with the size of GM they would have had relationships with both vendors. The Intel was preferred but AMD was backup. I wonder if any PCMs were produced with the AMD parts. If so, all code needs to check the manufacturer and device id and have these separate routines. I noticed this in the erase code where there is a sequence for the AMD only UNLOCK.
Not had tiime to look at the '97 code you sent yet, but thank you for the update.
After this post, I plan to move details back to the '97 F-body thread. I now notice that this thread was to be about XDF and my posts are a bit of a hijack...
-Tom
Code:
*************************************************
* SEND ALDL MESSAGE
*************************************************
012C 36 PSHA ; SAVE REGISTERS ON STACK
012D 18 3C PSHY ;
012F 3C PSHX ; MOVE POINTER TO MESSAGE ON STACK
0130 18 38 PULY ; TO IY
0132 CE 10 00 LDX #$1000 ; 68HC11 REGISTER BASE ADDRESS
0135 86 08 LDAA #$08 ; TRANSMIT ENABLE
0137 A7 2D STAA $2D,X ; SCI CONTROL REGISTER
0139 37 PSHB ; RT DELAY
013A C6 0B LDAB #$0B ;
013C 5A DECB ;
013D 26 FD BNE $013C ;
013F 33 PULB ;
0140 B6 18 03 LDAA $1803 ; PRU PORT B DIRECTION
0143 8A 40 ORAA #$40 ;
0145 B7 18 03 STAA $1803 ;
0148 B6 18 02 LDAA $1802 ; PRU PORT B
014B 8A 40 ORAA #$40 ; ALDL TX ENABLE
014D B7 18 02 STAA $1802 ;
0150 4F CLRA ; INITIALIZE CHECKSUM
0151 97 2E STAA @$2E ;
* MESSAGE CONTENT:
* [DEVICE ID] [LENGTH] [MODE] [MESSAGE …] [CHECKSUM]
*
* DEVICE ID: $F4 FOR TSIDE, $E4 FOR ESIDE
* LENGTH: MESSAGE LENGTH + $52
* MESSAGE LENGTH INCLUDES DEVICE ID, LENGTH, MODE, MESSAGE() AND CHECKSUM
* MODE: MODE1 – READ DIAGNOSTIC INFORMATION
* MODE2 – READ MEMORY SEGMENT (64 Bytes)
* MODE3 – READ MEMORY SEGMENT (Arbitrary, 1-84 Bytes)
* MODE4 – TEST ACTUATORS
* MODE5 – ENTER PROGRAMMING MODE
* MODE6 – UPLOAD AND EXECUTE PROGRAM SEGMENT
* MODE7 – BROADCAST
* MODE8 – DISABLE CHATTER (TAKE BUS MASTER)
* MODE9 – ENABLE CHATTER (GIVE BUS MASTER)
* MODE10 – CLEAR MALF CODES
* MODE12 – PROGRAM AUXILIARY FLASH MEMORY
* MODE13 – SECURITY CHALLENGE/RESPONSE
*
0153 86 F4 LDAA #$F4 ; PCM DEVICE ID: PCM
0155 8D 2E BSR $0185 ; SCI TRANSMIT BYTE
0157 17 TBA ; MESSAGE CONTENT LENGTH
0158 8B 55 ADDA #$55 ; LENGTH: ID + LENGTH + CONTENT +SUM + 0X52
015A 8D 29 BSR $0185 ; SCI TRANSMIT BYTE
015C 18 A6 00 LDAA $00,Y ; LOOP THROUGH MESSAGE
015F 8D 24 BSR $0185 ; SCI TRANSMIT BYTE
0161 18 08 INY ; INCREMENT POINTER
0163 5A DECB ; DECREMENT REMAINING BYTE COUNT
0164 26 F6 BNE $015C ; LOOP
0166 96 2E LDAA @$2E ; CHECKSUM
0168 40 NEGA ; NEGATE, SUM OF 0XFF
0169 8D 1A BSR $0185 ; SCI TRANSMIT BYTE
016B 1F 2E 40 FC BRCLR $2E,X,$40,$016B ; LOOP TILL TRANSMIT COMPLETE
016F B6 18 03 LDAA $1803 ; SET PRU PORT B DIRECTION
0172 84 BF ANDA #$BF ; DEFAULT ALDL TO DISABLE TX
0174 B7 18 03 STAA $1803 ;
0177 37 PSHB ; SAVE REGISTERS
0178 C6 0B LDAB #$0B ; 3 + 2 + (11 *5) + 4 = 64 ECLOCK
017A 5A DECB ; RT DELAY = 20US
017B 26 FD BNE $017A ; LOOP
017D 33 PULB ; RESTORE REGISTERS
017E 1D 2D 08 BCLR $2D,X,$08 ; DISABLE SCI TRANSMITTER SCCR2:TE
0181 18 38 PULY ; RESTORE REGISTERS
0183 32 PULA ;
0184 39 RTS ; DONE
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