Originally Posted by
Tom H
How does the low res rising edge relate to TDC of that cylinder? My guess is that they align(?)
It looks to me like each of the rising edges of low res indicate TDC of one of the cylinders. I have not yet confirmed/matched up the low res slot width with the cylinder. There are quite a few things to work out just to get there.
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To the tuners here: How important is the accuracy of the low res pulse relative to the actual engine position? It seems to me this would be critical. Is there a calibration to offset the inputs if the distributor is not in *perfect* time with the engine? Answers here are a great help because they let me guess about what I see in the code.
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I have isolated each of the four TPU interrupts and placed scope triggers in each routine. This lets me look in detail at what the service is trying to accomplish. I know each of the software builds is different in the code loaded into the TPU. This affects some (all?) of the register assignments. I am working through the register set to identify the purpose and how it is configured. What follows is for the '97 code but not all address assignments will have changed from earlier code.
Register $15D8 in the TPU is the latched high resolution count as at the last low resolution rising edge. Since this is a 4stroke V8, this count should always be 90 with a good opti-sparker. In my case I am simulating the optispark, so the math works perfectly. This register is used for diagnostics and to set spark timing. The register is used with register $16C2 to diagnose a dead low resolution signal. The test however is quite crude. It doesn't look for the 90 degrees that it should always be. The need for not having false triggers of SES had the designers looking for two revolutions of the engine without seeing a low res. The engine will still work fine unless some upset happens where the PCM goes out of sync with the engine. This could easily happen on startup or other events.
Think your opti might be on the way out? Wondering about the quality of the opti you just installed? Looking at location $0245, perhaps logging it for a bit while going through the gears will tell you about the stability of the opti. If you see a constant 90 ($005A) this indicates things are in good order. See a higher number from time to time? That would be a bit of a head scratcher... perhaps indicates dirt on one of the low res windows. Lower number indicates missing high res pulses. This could result from dirt on a high res window but more likely the optical module is on the way out.
This is how far I got, will keep plugging at it.
Here is a snip of code for your interest:
Code:
* OPTISPARK TEST
* P1371 DISTRIBUTOR IGNITION LOW RESOLUTION CIRCUIT
loc_6008:
ldaa byte_203E ; DTC TEST ENABLE: CALIBRATION: $3F
bita #$08 ; P1371 DISTRIBUTOR IGNITION LOW RESOLUTION CIRCUIT
beq loc_6063 ; TEST DISABLED
sei ; DISABLE INTERRUPTS
ldaa word_15D8 ; HIRES COUNT AT LAST LOW RESOLUTION RISING EDGE
ldx word_15D8 ; READ REGISTER
pshx ; PUSH COUNT ON STACK
ldaa word_16C2 ; UNLATCHED HIGH RESOLUTION PULSE COUNT
ldd word_16C2 ; READ REGISTER
cli ; ENABLE INTERRUPTS
tsx ; POINTER TO LATCHED COUNT
subd $00,x ; DIFFERENCE: CURRENT COUNT LESS LAST LOW RES COUNT
pulx
std word_0245 ; HIGH RES COUNTS SINCE LAST LO RES RISING EDGE
ldaa byte_0248 ; P1371 CLEAR DTC COUNT
adda #$01 ; INCREMENT
sbca #$00 ; PREVENT OVERFLOW
staa byte_0248 ; UPDATE
ldd word_0245 ; HIGH RES COUNTS SINCE LAST LO RES RISING EDGE
cpd word_204B ; CALIBRATION: $02D0, 720, P1371 FAILURE THRESHOLD
bls loc_604F ; TWO REVOLUTION NOT PAST SINCE LAST LO RES RISING
ldaa byte_0247 ; P1371 SET FAULT COUNT
adda #$01 ; INCREMENT
sbca #$00 ; PREVENT OVERFLOW
staa byte_0247 ; UPDATE
cmpa byte_204D ; P1371 SET DTC THRESHOLD
bls loc_604F ; BELOW DTC THRESHOLD
bset <byte_0062 $01 ; SET P1371: DISTRIBUTOR LOW RES CIRCUIT FLAG
bclr <byte_0062 $02 ; CLEAR P1371: DISTRIBUTOR LOW RES CIRCUIT FLAG
bra loc_605D
loc_604F:
ldaa byte_0248 ; P1371 CLEAR DTC COUNT
cmpa byte_204E ; P1371 CLEAR DTC THRESHOLD
bls loc_6063 ; BELOW DTC THRESHOLD
bset <byte_0062 $02 ; CLEAR P1371: DISTRIBUTOR LOW RES CIRCUIT FLAG
bclr <byte_0062 $01 ; SET P1371: DISTRIBUTOR LOW RES CIRCUIT FLAG
loc_605D:
clr byte_0248 ; P1371 CLEAR DTC COUNT
clr byte_0247 ; P1371 SET DTC COUNT
loc_6063:
jmp loc_6311
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